Design and verification of digital filters of a given structure in the VHDL language

  • В. П. Малахов
  • А. Ю. Мельниченко
  • В. Г. Бровков

Abstract

A configurable component in the VHDL language for FIR and IIR digital filtering is proposed. The component can be used as a software IP core in larger projects. RTL model verification technique has been developed.

Published
2019-03-31
Issue
No. 72(72) (2009): Electrical engineering and electrical equipment
Section
Automated Electromechanical Systems