THE SEARCH OF LUT UNITS IN INFORMATION FPGA-BASED DEVICE MODEL WITHIN THE FRAMEWORK OF PROGRAM CODE INTEGRITY MONITORING

Abstract

The problem of provision of the program code integrity of the computer system FPGA-based
components is analyzed. It is noted in the article that the perspective direction of integrity monitoring of such
kind of components is the embedding of monitoring hash immediately in a program code in the form of digital watermark. It is also noted that one of the important stages of preparation for embedding the digital watermark in FPGA program code is the LUT unit selection from the information FPGA-based device model.
The mentioned units are the place of immediate location of the digital watermark. The unit should be selected with considering the natural restrictions and secret key ones used for embedding the digital watermark. A
formalized procedure of the target LUT unit search in the information model of FPGA-device circuit was
proposed. This unit program code is the place of immediate imbedding the digital watermark. The approaches to software implementation of the offered procedure are considered. The analysis of CAD Altera Quartus
structure, in the environment of which the target procedure is to be implemented, was made. As a result of
analysis the possibility of interaction of software realizing the proposed procedure with CAD Altera Quartus
through the corresponding software interface API Quartus was found out. The possibility to obtain the information necessary for the creation of LUT-circuit information model through API Quartus was researched. The approaches to the automated analysis of program code and structure of FPGA-projects with
the view of their integrity monitoring were further developed. The procedure offered in the work and the software, which implements it, can be applied in organizing the data preparation subsystem within the framework
of the system of FPGA chip program code integrity monitoring.